The present invention relates generally to semiconductor fabrication, and more particularly to a stacked semiconductor package and a method for fabricating the same.
Recently there have been a number of advancements in developing semiconductor chips that are capable of storing massive amounts of data and processing these massive amounts of data within relatively short periods of time.
In general, semiconductor packages are fabricated using a die sorting process, a die attach process, a wire bonding process and a molding process. The die sorting process is used to inspect semiconductor chips. The die attach process is used to mount good semiconductor chips onto printed circuit boards. The wire bonding process is used to electrically connect together the semiconductor chips to the substrate by using conductive wires. The molding process is used to mold the semiconductor chip with a molding member such as an epoxy resin molding member.
Recently, there has also been a number of advancements in developing stacked semiconductor packages. Stacked semiconductor packages are those that have a plurality of semiconductor packages stacked on top of each other. However, a problem occurs when fabricating these stacked semiconductor packages. In particular, when using the semiconductor package molded by a molding member, the number of steps and the complexity of the fabrication process of fabricating these semiconductor packages increases.
Furthermore, another problem arises when electrically connecting the substrate and the respective semiconductor chips together. In particular, when using conductive wires after the semiconductor chips are stacked onto the substrate, it is difficult to design a wiring scheme to operate the semiconductor chips at acceptable high speeds. One encumbrance is that the lengths of the conductive wires connected with the respective semiconductor chips are different.